Test chip, GeoBox, PFM, Dec 7 2000


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  1. Plot of the 0.18um test chip. 64x64 RAMs on right, 32x32 RAMs on bottom, CAM on bottom left, DLL on left
  2. CLK block with frequency multiplier on left and DLL on right
  3. Close up of RAM array
  4. Test chip debug board with logic analyser leads attached
  5. Another view of the board --- our low cost chip tester
  6. GeoBox receiver PCB with ChipA, QED MIPS processor, Xilinx FPGA visible
  7. GeoBox PCB with Geocast's system controller chip near the large white PCI slot on the left
  8. Another picture of the board showing the 2 digital TV receivers in the metal can
  9. GeoBox with bottom removed. PCB on top of chassis and hard drive/power supply mounted on other side. The fine wires attach to thermocouples to measure temperature inside enclosure
  10. GeoBox from trial manufacturing run
  11. Rear of the GeoBox. Power cable, antenna cable, USB and ethernet connectors, smart card slot. Fan inside grille
  12. Our high-gain digital TV antenna. Circuit board inside is powered through the coax cable
  13. GeoBrick and antenna setup
  14. The guts of an Echostar satellite receiver box. Smart card is on the bottom left
  15. Mira in dad's office
  16. Playing mover in dad's office
  17. Plot of PFM. Blocks are:
    front-end glue-logic serial controller PCI
    deinterleaver smart card data streaming  
    Reed-Solomon PID filter data streaming PCI
    memory controller   DLL+clk mult+DLL JTAG
  18. Pool room
  19. Break room
  20. Well stocks cupboard for the engineers